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2SK2553(L), 2SK2553(S)
Silicon N Channel MOS FET High Speed Power Switching
REJ03G1015-1000 (Previous: ADE-208-357H) Rev.10.00 Sep 07, 2005
Application
High speed power switching
Features
* * * * Low on-resistance RDS(on) = 7 m typ. High speed switching 4 V gate drive device can be driven from 5 V source
Outline
RENESAS Package code: PRSS0004AE-A (Package name: LDPAK(L))
4
RENESAS Package code: PRSS0004AE-B (Package name: LDPAK(S)-(1))
4 G 1 2 D 1. Gate 2. Drain 3. Source 4. Drain
3 S
1
2
3
Rev.10.00 Sep 07, 2005 page 1 of 8
2SK2553(L), 2SK2553(S)
Absolute Maximum Ratings
(Ta = 25C)
Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Avalanche current Avalanche energy Channel dissipation Channel temperature Storage temperature Notes: 1. PW 10 s, duty cycle 1 % 2. Value at Tc = 25C 3. Value at Tch = 25C, Rg 50 Symbol VDSS VGSS ID ID(pulse) Note 1 IDR IAP Note 3 EAR Note 3 Pch Note 2 Tch Tstg Ratings 60 20 50 200 50 45 174 75 150 -55 to +150 Unit V V A A A A mJ W
C C
Electrical Characteristics
(Ta = 25C)
Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body to drain diode forward voltage Body to drain diode reverse recovery time Note: 4. Pulse Test Symbol V(BR)DSS V(BR)GSS IGSS IDSS VGS(off) RDS(on) |yfs| Ciss Coss Crss td(on) tr td(off) tf VDF trr Min 60 20 -- -- 1.0 -- -- 35 -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- 7 10 55 3550 1760 500 35 230 470 360 0.85 135 Max -- -- 10 10 2.0 10 16 -- -- -- -- -- -- -- -- -- -- Unit V V A A V m m S pF pF pF ns ns ns ns V ns Test Conditions ID = 10 mA, VGS = 0 IG = 100 A, VDS = 0 VGS = 16 V, VDS = 0 VDS = 60 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 25 A, VGS = 10 V Note 4 ID = 25 A, VGS = 4 V Note 4 ID = 25 A, VDS = 10 V Note 4 VDS = 10 V, VGS = 0, f = 1 MHz ID = 25 A, VGS = 10 V, RL = 1.2
IF = 50 A, VGS = 0 IF = 50 A, VGS = 0 diF / dt = 50 A / s
Rev.10.00 Sep 07, 2005 page 2 of 8
2SK2553(L), 2SK2553(S)
Main Characteristics
Power vs. Temperature Derating
100
Maximum Safe Operation Area
500 200
10
PW
D C O
Channel Dissipation Pch (W)
Drain Current ID (A)
75
100 50 20 10 5 2 Ta = 25C 0.5 0.1 0.3 1 1
Operation in this area is limited by RDS(on)
10
=
0
s
1
10
io
s
m
m
s
sh ot
50
s
pe t ra
(1
n c (T
)
= 25 C
25
)
0
50
100
150
200
3
10
30
100
Case Temperature TC (C)
Drain to Source Voltage VDS (V)
Typical Output Characteristics
100 10 V 6 V 5V Pulse Test 100
Typical Transfer Characteristics
Drain Current ID (A)
60 3V
Drain Current ID (A)
80
4V
3.5 V
80
VDS = 10 V Pulse Test
60
40
40 25C Tc = 75C 20 -25C 1 2 3 4 5
20 VGS = 2.5 V 0 2 4 6 8 10
0
Drain to Source Voltage VDS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage
1.0 Pulse Test
Gate to Source Voltage VGS (V) Static Drain to Source on State Resistance vs. Drain Current
0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 1 3 10 30 100 300 1000 VGS = 4 V 10 V Pulse Test
Drain to Source Saturation Voltage VDS (on) (V)
0.8
0.6
0.4
ID = 50 A
0.2
20 A 10 A 2 4 6 8 10
0
Gate to Source Voltage VGS (V)
Static Drain to Source on State Resistance RDS (on) ()
0.0005
Drain Current ID (A)
Rev.10.00 Sep 07, 2005 page 3 of 8
2SK2553(L), 2SK2553(S)
Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current
Static Drain to Source on State Resistance RDS (on) ()
Forward Transfer Admittance yfs (S)
0.04 Pulse Test 0.032
500 200 100 50 20 10 5 2 1 0.5 0.1 0.3 1 3 10 30 100 75C 25C Tc = -25C VDS = 10 V Pulse Test
0.024
ID = 50 A 10, 20 A VGS = 4 V 10, 20, 50 A 10 V
0.016
0.008 0 -40
0
40
80
120
160
Case Temperature TC (C) Body to Drain Diode Reverse Recovery Time
Drain Current ID (A) Typical Capacitance vs. Drain to Source Voltage
10000 5000
Reverse Recovery Time t rr (ns)
5000 2000
Capacitance C (pF)
1000 500 200 100 50 20 10 5 0.1 0.3 1 di / dt = 50 A / s VGS = 0, Ta = 25C 3 10 30 100
Ciss
2000 1000 500
Coss
Crss
200 100
VGS = 0 f = 1 MHz
0
10
20
30
40
50
Reverse Drain Current IDR (A)
Drain to Source Voltage VDS (V)
Dynamic Input Characteristics
Switching Characteristics
Drain to Source Voltage VDS (V)
ID = 50 A
Gate to Source Voltage VGS (V)
100
20
5000 2000
80 VDD = 10 V 25 V 50 V
VGS
16
Switching Time t (ns)
1000 500 200 100 50 20 10 5 0.1 0.3
td(off) tf tr td(on)
60
VDS
12
40
8
20
VDD = 50 V 25 V 10 V 40 80 120 160
4 0 200
VGS = 10 V, VDD = 30 V PW = 5 s, duty < 1 %
0
1
3
10
30
100
Gate Charge Qg (nc)
Drain Current ID (A)
Rev.10.00 Sep 07, 2005 page 4 of 8
2SK2553(L), 2SK2553(S)
Reverse Drain Current vs. Source to Drain Voltage
100
Repetitive Avalanche Energy EAR (mJ)
Maximum Avalanche Energy vs. Channel Temperature Derating
200 IAP = 45 A VDD = 25 V duty < 0.1 % Rg > 50
Reverse Drain Current IDR (A)
Pulse Test 80 10 V 5V VGS = 0, -5 V
160
60
120
40
80
20
40 0 25
0
0.4
0.8
1.2
1.6
2.0
50
75
100
125
150
Source to Drain Voltage
VSD (V)
Channel Temperature Tch (C)
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance s (t)
3 Tc = 25C 1 D=1 0.5 0.3
0.2
0.1
0.1
0.05
ch - c(t) = s (t) * ch - c ch - c = 1.67C/W, Tc = 25C PDM PW T 1m 10 m 100 m 1 10 D= PW T
0.03
0.02 1 lse 0.0 t pu ho 1s
100
0.01 10
Pulse Width Avalanche Test Circuit
VDS Monitor L
PW (S) Avalanche Waveform
VDSS 1 * L * IAP2 * VDSS - VDD 2 V(BR)DSS
EAR = IAP Monitor
Rg Vin 15 V
D. U. T
VDD
IAP VDS ID
50 VDD
0
Rev.10.00 Sep 07, 2005 page 5 of 8
2SK2553(L), 2SK2553(S)
Switching Time Test Circuit
Vin Monitor D.U.T. RL VDD = 30 V 90% td(on) 90% td(off) tf Vin Vout Vin 10 V 50 Vout Monitor 10% 10% 10%
Waveform
90%
tr
Rev.10.00 Sep 07, 2005 page 6 of 8
2SK2553(L), 2SK2553(S)
Package Dimensions
JEITA Package Code
RENESAS Code
PRSS0004AE-A
Package Name LDPAK(L) / LDPAK(L)V
MASS[Typ.] 1.40g
Unit: mm
(1.4)
4.44 0.2 10.2 0.3 1.3 0.15
11.3 0.5 0.3 10.0 + 0.5 -
8.6 0.3
1.3 0.2 1.37 0.2
0.76 0.1 2.54 0.5 2.54 0.5
11.0 0.5
0.2 0.86 + 0.1 -
2.49 0.2
0.4 0.1
JEITA Package Code SC-83
RENESAS Code PRSS0004AE-B
Package Name LDPAK(S)-(1) / LDPAK(S)-(1)V
MASS[Typ.] 1.30g
Unit: mm
4.44 0.2 10.2 0.3
(1.4)
8.6 0.3
+ 0.3 - 0.5
10.0
(1.5)
(1.5)
2.49 0.2 0.2 0.1 + 0.1 -
7.8 7.0
2.2
1.37 0.2 1.3 0.2 2.54 0.5
0.3 3.0 + 0.5 -
0.2 0.86 + 0.1 -
0.4 0.1
2.54 0.5
Rev.10.00 Sep 07, 2005 page 7 of 8
1.7
1.3 0.15
7.8 6.6
2SK2553(L), 2SK2553(S)
Ordering Information
Part Name 2SK2553L-E 2SK2553STL-E Quantity 500 pcs 1000 pcs Box (Sack) Taping Shipping Container
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product.
Rev.10.00 Sep 07, 2005 page 8 of 8
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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(c) 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .3.0

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